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Texas Instruments /MSP432P4111 /SYSCTL_A /SYS_NMI_CTLSTAT

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Interpret as SYS_NMI_CTLSTAT

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CS_SRC_0)CS_SRC 0 (PSS_SRC_0)PSS_SRC 0 (PCM_SRC_0)PCM_SRC 0 (PIN_SRC_0)PIN_SRC 0 (CS_FLG_0)CS_FLG 0 (PSS_FLG_0)PSS_FLG 0 (PCM_FLG_0)PCM_FLG 0 (PIN_FLG_0)PIN_FLG

CS_FLG=CS_FLG_0, PSS_SRC=PSS_SRC_0, PSS_FLG=PSS_FLG_0, PIN_SRC=PIN_SRC_0, CS_SRC=CS_SRC_0, PCM_FLG=PCM_FLG_0, PCM_SRC=PCM_SRC_0, PIN_FLG=PIN_FLG_0

Description

NMI Control and Status Register

Fields

CS_SRC

CS interrupt as a source of NMI

0 (CS_SRC_0): Disables CS interrupt as a source of NMI

1 (CS_SRC_1): Enables CS interrupt as a source of NMI
PSS_SRC

PSS interrupt as a source of NMI

0 (PSS_SRC_0): Disables the PSS interrupt as a source of NMI

1 (PSS_SRC_1): Enables the PSS interrupt as a source of NMI
PCM_SRC

PCM interrupt as a source of NMI

0 (PCM_SRC_0): Disbles the PCM interrupt as a source of NMI

1 (PCM_SRC_1): Enables the PCM interrupt as a source of NMI
PIN_SRC

RSTn/NMI pin configuration

Note: When the device enters LPM3/LPM4 modes of operation, the functionality selected by this bit is retained. If selected as an NMI, activity on this pin in

LPM3/LPM4 wakes the device and processes the interrupt, without causing a POR. If selected as a Reset, activity on this pin in LPM3/LPM4 causes a device-level POR

When the device enters LPM3.5/LPM4.5 modes of operation, this bit is always cleared to 0. In other words, the RSTn/NMI pin always assumes a reset functionality in LPM3.5/LPM4.5 modes.

0 (PIN_SRC_0): Configures the RSTn_NMI pin as a source of POR Class Reset

1 (PIN_SRC_1): Configures the RSTn_NMI pin as a source of NMI
CS_FLG

CS interrupt was the source of NMI

0 (CS_FLG_0): indicates CS interrupt was not the source of NMI

1 (CS_FLG_1): indicates CS interrupt was the source of NMI
PSS_FLG

PSS interrupt was the source of NMI

0 (PSS_FLG_0): indicates the PSS interrupt was not the source of NMI

1 (PSS_FLG_1): indicates the PSS interrupt was the source of NMI
PCM_FLG

PCM interrupt was the source of NMI

0 (PCM_FLG_0): indicates the PCM interrupt was not the source of NMI

1 (PCM_FLG_1): indicates the PCM interrupt was the source of NMI
PIN_FLG

RSTn/NMI pin was the source of NMI

0 (PIN_FLG_0): Indicates the RSTn_NMI pin was not the source of NMI

1 (PIN_FLG_1): Indicates the RSTn_NMI pin was the source of NMI

Links

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Register License

Copyright © 2012-2018 Texas Instruments Incorporated - http://www.ti.com/

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data